UNDERGRADUATE

EE338L

ANALOG INTEGRATED CIRCUIT DESIGN

Analysis and design of analog integrated circuits; transistor models, integrated circuit technologies; layout techniques; mismatches; simple and advanced current mirrors, single-stage amplifiers; differential-pair amplifiers; frequency response; noise considerations; feedback; nonlinear circuits; cascode amplifiers; telescopic and folded-cascode operational amplifiers; two-stage operational amplifiers using state-of-the-art EDA/CAD tools for design simulation and layout.

EE360M

DIGITAL SYSTEMS DESIGN USING VHDL

Hardware implementation of arithmetic and other algorithmic processes; hardware description languages (VHDL); organization, design, and simulation of digital systems.

EE360R

COMPUTER-AIDED INTEG CIRCUIT DESIGN

Theory and practice of integrated circuit design. Classes of chip design, chip partitioning, and architecture; computer-aided design tools for simulation and physical design

EE360S

DIGITAL INTEGRATED CIRCUIT DESIGN

Circuit-level aspects of metal oxide silicon (MOS) and bipolar integrated circuit technologies. Logic gates and latches; propagation delays; circuit simulation models.

EE379K

ANALOG ICS FOR COMMUNICATION SYSTEMS

Device models, small-signal circuit analysis, noise and distortion in devices and circuits, including relevant metrics; biasing techniques, voltage references, current sources and biasing for low-noise applications; amplifier design techniques for low noise, variable gain amplifiers, power amplifiers; integrated mixers; and integrated oscillators.

GRADUATE COURSES

EE382M-1

VLSI TESTING

Hardware and software reliability analysis of digital systems; testing, design for testability, self-diagnosis, fault-tolerant logic design, error-detecting and error-correcting codes.

EE382M-10

SYNTHESIS OF DIGITAL SYSTEMS

Automatic generation of gate-level implementations from HDL specifications; optimization of two-level, multilevel, and sequential circuits for area, speed, and testability.

EE382M-11

VERIFICATION OF DIGITAL SYSTEMS

Automatic verification of digital systems; formal models and specifications, equivalence checking, design verification, temporal logic, BDDs, logical foundations, automata theory, recent developments

EE382M-12

SYSTEM DESIGN METRICS

Analysis of design at chip, board, and system levels; life cycle implications of design decisions, including design for testability effects on production and field service; economic and customer-driven factors

EE382M-14

ANALOG INTEGRATED CIRCUIT DESIGN

Design and implementation of analog integrated circuits (ICs) focusing on transistor-level design of circuits using the modern semiconductor fabrication processes, particularly CMOS. The blocks and circuit architectures discussed in this course are the core components of most integrated systems and essential in applications such as communications, multimedia, imaging, sensors, and biomedical.

EE382M-2

DEPENDABLE COMPUTING

Design techniques for reliable, fault-tolerant, fail-safe and fail-soft systems; fault diagnosis and fault avoidance methods at program and system levels; experimental and commercial fault-tolerant computer systems.

EE382M-7

VLSI TESTING:

VLSI I: CMOS technology; structured digital circuits; VLSI systems; computer-aided design tools and theory for design automation; chip design.

EE382M-8

VLSI II

Microelectronic systems architecture; VLSI circuit testing methods; integration of heterogeneous computer-aided design tools; wafer scale integration; advanced high-speed circuit design and integration.

EE382V

Radio Frequency Integrated Circuit Design

Design and analysis of RF and analog ICs, including a description of noise and distortion in devices and circuits; biasing techniques including voltage references, current sources and biasing for low-noise applications; amplifier design techniques for low noise, variable gain, high output power and high dynamic range; integrated mixers and other frequency converters; rectifier circuits; and integrated oscillators for generating fixed and variable frequencies.

EE382V

CAD DEEP SUB

Overview of the CAD flow; basics of logic synthesis; graph theory and computational complexity; partitioning; floorplanning and placement; global and detailed routing; static timing analysis and delay modeling; timing closure and physical synthesis; noise sources in timing analysis and PD; CAD for manufacturability; statistical timing analysis and statistical circuit optimization

EE382V

NANOSCALE IC DESIGN

CMOS technology and design scaling; nanometer transistors and their models; design time power optimization (circuit-level techniques, architecture, interconnect, memory); standby-mode power optimization (circuits and systems, memory); runtime power optimization (circuits and systems); sources of variability; statistical data collection and analysis of variance; statistical circuit simulation and timing analysis; manufacturability and resolution enhancement techniques.

EE382V:

SYSTEM-ON-A-CHIP DESIGN-ICS

Concepts, issues, and process of system-level design of embedded systems, i.e., hardware-software co-design & co-verification; modeling and specification of an embedded system at a high level of abstraction; use of co-simulation to validate system functionality; analysis of functional and nonfunctional performance of the system early in the design process to support design decisions; analysis of hardware/software tradeoffs, algorithms, and architectures to optimize the system based on requirements and implementation constraints.

EE382V

EMBEDDED SYSTEM DESIGN AND MODELING

This course presents state-of-the-art methods, tools and techniques for system-level design and modeling of complete multi-processor systems from specification down to implementation across hardware-software boundaries. Using the SpecC language and the System-On-Chip Environment (SCE), we will specify, simulate, analyze, model and design systems based on examples of typical embedded applications.

EE382V

VLSI PHYSICAL DESIGN AUTOMATION

Fundamentals of physical design, the process of transforming structural representation of a VLSI system into layout representation. This course focuses on design automation problems including: logic partitioning, floorplanning, placement, global routing, detailed routing, clock and power routing, and new trends in physical synthesis. Optimization techniques, such as graph theory, network flow, Steiner tree, simulated annealing, generic algorithm, and linear/convex programming are also covered.

EE382V

OPTIMIZATION ISSUES IN VLSI CAD

As CMOS scales into deep submicron dimensions, VLSI designs are interconnect-dominated for the overall chip performance, cost, and reliability.  The resulting design closure problem has been a key challenge for deep-submicron (DSM) VLSI design automation. Meanwhile, as CMOS continues scaling to 45nm and beyond, power is becoming a key limiting factor, together with other nanometer physical effects (such as noise and reliability) and manufacturing constraints.  All these make nanometer VLSI designs extremely complex. Intelligent computer-aided design (CAD) and optimization tools are essential to providing the best overall system performance, power, reliability, and manufacturability.