ICS Seminar: Prof. Jiang Hu

Posted on April 5, 2013

Date and time: Thursday, April 12, 2013, 2-3 p.m.
Location: ACES 2.402

Talk Title:

Voltage Adaptation for Power-Efficient Integrated Circuits


As people cram more and more functions into IC chips, the chip power density quickly approaches its fundamental limit. Power has surpassed performance and become the number one concern in many chip designs, from mobile to server applications. This talk will present some recent works on how to improve chip power efficiency at both architectural level and circuit level. At the architectural level, the power challenge is compounded by the increasingly large demand for on-chip communication bandwidth and data storage capacity. I will show how to efficiently monitor the performance of on-chip network and shared cache in chip multiprocessors. Dynamic voltage and frequency scaling control techniques for the shared resources will be described. At the circuit level, variability is another challenge that exacerbates the power problem. This talk will introduce a couple of voltage adaptation techniques that aim to harness the variability challenge in a power-efficient manner.

Speaker Bio:

Jiang Hu received the B. S. degree in optical engineering from Zhejiang University, China, in 1990, the M. S. degree in physics in 1997, and the Ph. D. degree in electrical engineering from the University of Minnesota in 2001. He was with IBM Microelectronics from January 2001 to June 2002. Currently, he is an associate professor in the Department of Electrical and Computer Engineering at the Texas A&M University. His research interest is on Computer-Aided Design for VLSI circuits and systems, especially on large scale circuit optimization, clock network synthesis, robust design and on-chip communication. He received a best paper award at the ACM/IEEE Design Automation Conference in 2001, an IBM Invention Achievement Award in 2003 and a best paper award at the IEEE/ACM International Conference on Computer-Aided Design in 2011. He has served as technical program committee member for DAC, ICCAD, ISPD, ISQED, ICCD, DATE, ASPDAC, ISLPED and ISCAS, technical program chair and general chair for the ACM International Symposium on Physical Design, and associated editor for IEEE Transactions on CAD and ACM Transactions on Design Automation of Electronic Systems.